HAL DMA types migration ¶

This section provides information about the HAL DMA types migration .

HAL DMA enumeration migration ¶

HAL DMA callback ID type definition ¶

HAL1	HAL2
typedef enum { HAL_DMA_XFER_M1CPLT_CB_ID, HAL_DMA_XFER_M1HALFCPLT_CB_ID, HAL_DMA_XFER_ALL_CB_ID, HAL_DMA_XFER_CPLT_CB_ID, HAL_DMA_XFER_HALFCPLT_CB_ID, HAL_DMA_XFER_SUSPEND_CB_ID, HAL_DMA_XFER_ABORT_CB_ID, HAL_DMA_XFER_ERROR_CB_ID, } HAL_DMA_CallbackIDTypeDef;	Removed Note The callback registration in HAL2 is handled by specific functions for each DMA event. These functions are used to register callback functions for different DMA events. See Callbacks register Callbacks functions for more details.

HAL DMA queue state type definition ¶

HAL1	HAL2
typedef enum { HAL_DMA_QUEUE_STATE_RESET, HAL_DMA_QUEUE_STATE_READY, HAL_DMA_QUEUE_STATE_BUSY } HAL_DMA_QStateTypeDef;	Removed : the HAL QUEUE state is not related to the physical instance and is not needed for the user.

HAL1

HAL2

                 typedef enum
{
    HAL_DMA_QUEUE_STATE_RESET,
    HAL_DMA_QUEUE_STATE_READY,
    HAL_DMA_QUEUE_STATE_BUSY
} HAL_DMA_QStateTypeDef;

                

                 Removed : the HAL QUEUE state is not related to the physical instance and is not needed for the user.

                

HAL DMA level complete type definition ¶

HAL1	HAL2
typedef enum { HAL_DMA_FULL_TRANSFER, HAL_DMA_HALF_TRANSFER } HAL_DMA_LevelCompleteTypeDef;	typedef enum { HAL_DMA_XFER_FULL_COMPLETE, HAL_DMA_XFER_HALF_COMPLETE, } hal_dma_xfer_level_t;

Related concept: Revised and optimized HAL state machine

HAL DMA state type definition ¶

HAL1	HAL2
typedef enum { HAL_DMA_STATE_RESET, HAL_DMA_STATE_READY, HAL_DMA_STATE_BUSY, HAL_DMA_STATE_ERROR, HAL_DMA_STATE_ABORT, HAL_DMA_STATE_SUSPEND HAL_DMA_STATE_TIMEOUT } HAL_DMA_StateTypeDef;	typedef enum { HAL_DMA_STATE_RESET, HAL_DMA_STATE_INIT, HAL_DMA_STATE_IDLE, HAL_DMA_STATE_ACTIVE, HAL_DMA_STATE_SUSPEND, HAL_DMA_STATE_ABORT, } hal_dma_state_t;

HAL1

HAL2

                 typedef enum
{
    HAL_DMA_STATE_RESET,
    HAL_DMA_STATE_READY,
    HAL_DMA_STATE_BUSY,
    HAL_DMA_STATE_ERROR,
    HAL_DMA_STATE_ABORT,
    HAL_DMA_STATE_SUSPEND
    HAL_DMA_STATE_TIMEOUT
} HAL_DMA_StateTypeDef;

                

                 typedef enum
{
    HAL_DMA_STATE_RESET,
    HAL_DMA_STATE_INIT,
    HAL_DMA_STATE_IDLE,
    HAL_DMA_STATE_ACTIVE,
    HAL_DMA_STATE_SUSPEND,
    HAL_DMA_STATE_ABORT,
} hal_dma_state_t;

                

Related concept: Revised and optimized HAL state machine

HAL DMA structure migration ¶

HAL DMA handle type definition ¶

HAL1	HAL2
DMA_HandleTypeDef	hal_dma_handle_t;

Related concepts:

HAL DMA data handling configuration type definition ¶

In HAL2, DataExchange is replaced with hal_dma_src_byte_exchange_t, hal_dma_dest_byte_exchange_t, and hal_dma_dest_halfword_exchange_t. DataAlignment is replaced with hal_dma_dest_data_trunc_padd_t and hal_dma_dest_data_pack_t.

HAL1	HAL2
typedef struct { uint32_t DataExchange; uint32_t DataAlignment; } DMA_DataHandlingConfTypeDef;	typedef struct { hal_dma_src_byte_exchange_t src_byte_exchange; hal_dma_dest_byte_exchange_t dest_byte_exchange; hal_dma_dest_halfword_exchange_t dest_halfword_exchange; hal_dma_dest_data_trunc_padd_t trunc_padd; hal_dma_dest_data_pack_t pack; } hal_dma_data_handling_config_t;

HAL1

HAL2

                 typedef struct
{
  uint32_t DataExchange;

  uint32_t DataAlignment;

} DMA_DataHandlingConfTypeDef;

                 typedef struct
{
  hal_dma_src_byte_exchange_t      src_byte_exchange;
  hal_dma_dest_byte_exchange_t     dest_byte_exchange;
  hal_dma_dest_halfword_exchange_t dest_halfword_exchange;

  hal_dma_dest_data_trunc_padd_t   trunc_padd;
  hal_dma_dest_data_pack_t         pack;
} hal_dma_data_handling_config_t;

                

HAL DMA trigger configuration type definition ¶

HAL1	HAL2
typedef struct { uint32_t TriggerSelection; uint32_t TriggerPolarity; uint32_t TriggerMode; } DMA_TriggerConfTypeDef;	typedef struct { hal_dma_trigger_source_t source; hal_dma_trigger_polarity_t polarity; hal_dma_trigger_mode_t mode; } hal_dma_trigger_config_t;

HAL1

HAL2

                 typedef struct
{
  uint32_t TriggerSelection;
  uint32_t TriggerPolarity;
  uint32_t TriggerMode;
} DMA_TriggerConfTypeDef;

                

                 typedef struct
{
  hal_dma_trigger_source_t   source;
  hal_dma_trigger_polarity_t polarity;
  hal_dma_trigger_mode_t     mode;
} hal_dma_trigger_config_t;

                

HAL DMA transfer configuration type definition ¶

HAL1	HAL2
typedef struct { uint32_t Request; uint32_t BlkHWRequest; uint32_t Direction; uint32_t SrcInc; uint32_t DestInc; uint32_t SrcDataWidth; uint32_t DestDataWidth; uint32_t Priority; uint32_t SrcBurstLength; uint32_t DestBurstLength; uint32_t TransferAllocatedPort; uint32_t TransferEventMode; uint32_t Mode; } DMA_InitTypeDef;	typedef struct { hal_dma_request_source_t request; In HAL2, use HAL_DMA_SetConfigDirectXferHardwareRequestMode() function to set config Direct transfer hardware request. hal_dma_direction_t direction; hal_dma_src_addr_increment_t src_inc; hal_dma_dest_addr_increment_t dest_inc; hal_dma_src_data_width_t src_data_width; hal_dma_dest_data_width_t dest_data_width; hal_dma_priority_t priority; In HAL2, use HAL_DMA_SetConfigDirectXferBurst() function to set DMA channel burst length. In HAL2, use HAL_DMA_SetConfigDirectXferPort() function instead. In HAL2, TransferEventMode is configured within the hal_dma_repeat_block_config_t structure. In HAL2, Mode is configured within the hal_dma_handle_t structure. } hal_dma_direct_xfer_config_t;

HAL1

HAL2

                 typedef struct
{
  uint32_t Request;

  uint32_t BlkHWRequest;


  uint32_t Direction;
  uint32_t SrcInc;
  uint32_t DestInc;
  uint32_t SrcDataWidth;
  uint32_t DestDataWidth;
  uint32_t Priority;

  uint32_t SrcBurstLength;
  uint32_t DestBurstLength;

  uint32_t TransferAllocatedPort;

  uint32_t TransferEventMode;

  uint32_t Mode;

} DMA_InitTypeDef;

                

                 typedef struct
{
  hal_dma_request_source_t      request;

  In HAL2, use HAL_DMA_SetConfigDirectXferHardwareRequestMode() function to set config Direct transfer hardware request.

  hal_dma_direction_t           direction;
  hal_dma_src_addr_increment_t  src_inc;
  hal_dma_dest_addr_increment_t dest_inc;
  hal_dma_src_data_width_t      src_data_width;
  hal_dma_dest_data_width_t     dest_data_width;
  hal_dma_priority_t            priority;

  In HAL2, use HAL_DMA_SetConfigDirectXferBurst() function to set DMA channel burst length.


  In HAL2, use HAL_DMA_SetConfigDirectXferPort() function instead.

  In HAL2, TransferEventMode is configured within the hal_dma_repeat_block_config_t structure.

  In HAL2, Mode is configured within the hal_dma_handle_t structure.

} hal_dma_direct_xfer_config_t;

                

HAL DMA linked-list configuration type definition ¶

HAL1	HAL2
typedef struct { uint32_t Priority; uint32_t LinkStepMode; uint32_t LinkAllocatedPort; uint32_t TransferEventMode; uint32_t LinkedListMode; } DMA_InitLinkedListTypeDef;	typedef struct { hal_dma_priority_t priority; In HAL2, use HAL_DMA_SetLinkedListXferExecutionMode() function instead. In HAL2, use HAL_DMA_SetLinkedListXferFetchNodePort() function instead. In HAL2, use HAL_DMA_FillNodeXferEventMode() function instead. hal_dma_linkedlist_xfer_event_mode_t xfer_event_mode; hal_dma_port_t fetch_port; } hal_dma_linkedlist_xfer_config_t;

HAL1

HAL2

                 typedef struct
{
  uint32_t Priority;

  uint32_t LinkStepMode;

  uint32_t LinkAllocatedPort;

  uint32_t TransferEventMode;

  uint32_t LinkedListMode;

} DMA_InitLinkedListTypeDef;

                 typedef struct
{
  hal_dma_priority_t                   priority;

  In HAL2, use HAL_DMA_SetLinkedListXferExecutionMode() function instead.

  In HAL2, use HAL_DMA_SetLinkedListXferFetchNodePort() function instead.

  In HAL2, use HAL_DMA_FillNodeXferEventMode() function instead.

  hal_dma_linkedlist_xfer_event_mode_t xfer_event_mode;

  hal_dma_port_t                       fetch_port;
} hal_dma_linkedlist_xfer_config_t;

HAL DMAMUX request generator parameters type definition ¶

HAL1	HAL2
typedef struct { uint32_t SignalID; uint32_t Polarity; uint32_t RequestNumber; } HAL_DMA_MuxRequestGeneratorConfigTypeDef;	typedef struct { hal_dma_dmamux_reqgen_source_t source; hal_dma_dmamux_reqgen_polarity_t polarity; uint32_t nbr_of_request; } hal_dma_dmamux_reqgen_config_t;

HAL1

HAL2

                 typedef struct
{
  uint32_t SignalID;

  uint32_t Polarity;
  uint32_t RequestNumber;

} HAL_DMA_MuxRequestGeneratorConfigTypeDef;

                

                 typedef struct
{
  hal_dma_dmamux_reqgen_source_t   source;

  hal_dma_dmamux_reqgen_polarity_t polarity;
  uint32_t                         nbr_of_request;

} hal_dma_dmamux_reqgen_config_t;

                

HAL DMA linked-list queue type definition ¶

In HAL2, DMA_QListTypeDef structure is removed from HAL DMA driver and replaced with hal_q_t in the HAL Q driver.

HAL1	HAL2
typedef struct { DMA_NodeTypeDef Head; DMA_NodeTypeDef FirstCircularNode; uint32_t NodeNumber; __IO HAL_DMA_QStateTypeDef State; __IO uint32_t ErrorCode; __IO uint32_t Type; } DMA_QListTypeDef;	typedef struct { void p_head_node; void p_tail_node; void p_first_circular_node; uint32_t node_nbr; There is no state machine for the HAL QUEUE driver, so the queue state is not needed. The HAL QUEUE error code is not related to the physical instance and is not needed for the user. In HAL2, the queue type is not needed for the user. uint32_t next_addr_offset; hal_q_addressing_mode_t addr_mode; void ( p_set_node)(uint32_t head, uint32_t prev, uint32_t next, uint32_t offset); uint32_t (* p_get_node)(uint32_t head, uint32_t node, uint32_t offset); } hal_q_t;

HAL1

HAL2

                 typedef struct
{
  DMA_NodeTypeDef            *Head;

  DMA_NodeTypeDef            *FirstCircularNode;
  uint32_t                   NodeNumber;

  __IO HAL_DMA_QStateTypeDef State;
  __IO uint32_t              ErrorCode;

  __IO uint32_t              Type;

} DMA_QListTypeDef;

                 typedef struct
{
    void     *p_head_node;
    void     *p_tail_node;
    void     *p_first_circular_node;
    uint32_t node_nbr;

    There is no state machine for the HAL QUEUE driver, so the queue state is not needed.
    The HAL QUEUE error code is not related to the physical instance and is not needed for the user.

    In HAL2, the queue type is not needed for the user.

    uint32_t next_addr_offset;
    hal_q_addressing_mode_t addr_mode;
    void (* p_set_node)(uint32_t head, uint32_t prev, uint32_t next, uint32_t offset);
    uint32_t (* p_get_node)(uint32_t head, uint32_t node, uint32_t offset);
} hal_q_t;

                

HAL DMA DMAMUX synchronization configuration type definition ¶

HAL1	HAL2
typedef struct { uint32_t SyncSignalID; uint32_t SyncPolarity; FunctionalState SyncEnable; FunctionalState EventEnable; uint32_t RequestNumber; } HAL_DMA_MuxSyncConfigTypeDef;	typedef struct { hal_dma_dmamux_sync_source_t source; hal_dma_dmamux_sync_polarity_t polarity; In HAL2, HAL_DMA_DMAMUX_EnableSync() function is added to enable synchronization. In HAL2, HAL_DMA_DMAMUX_EnableSyncEvent() function is added to enable event. uint32_t nbr_of_request; } hal_dma_dmamux_sync_config_t;

HAL1

HAL2

                 typedef struct
{
  uint32_t SyncSignalID;
  uint32_t SyncPolarity;

  FunctionalState SyncEnable;
  FunctionalState EventEnable;

  uint32_t RequestNumber;
} HAL_DMA_MuxSyncConfigTypeDef;

                

                 typedef struct
{
  hal_dma_dmamux_sync_source_t   source;
  hal_dma_dmamux_sync_polarity_t polarity;

  In HAL2, HAL_DMA_DMAMUX_EnableSync() function is added to enable synchronization.
  In HAL2, HAL_DMA_DMAMUX_EnableSyncEvent() function is added to enable event.

  uint32_t                       nbr_of_request;
} hal_dma_dmamux_sync_config_t;

                

HAL DMA channel node configuration type definition ¶

HAL1	HAL2
typedef struct { uint32_t NodeType; DMA_InitTypeDef Init; DMA_DataHandlingConfTypeDef DataHandlingConfig; DMA_TriggerConfTypeDef TriggerConfig; DMA_RepeatBlockConfTypeDef RepeatBlockConfig; uint32_t SrcAddress; uint32_t DstAddress; uint32_t DataSize; uint32_t SrcSecure; uint32_t DestSecure; } DMA_NodeConfTypeDef;	typedef struct { The node type is removed from the node configuration structure and added as parameter in functions: HAL_DMA_FillNodeConfig() and HAL_DMA_FillNodeDirectXfer(). hal_dma_direct_xfer_config_t xfer; hal_dma_data_handling_config_t data_handling; hal_dma_trigger_config_t trigger; hal_dma_repeat_block_config_t repeat_block; hal_dma_hardware_request_mode_t hw_request_mode; uint32_t src_addr; uint32_t dest_addr; hal_dma_port_t src_port; hal_dma_port_t dest_port; uint32_t src_burst_length_byte; uint32_t dest_burst_length_byte; hal_dma_linkedlist_xfer_event_mode_t xfer_event_mode; uint32_t size_byte; hal_dma_sec_attr_t channel_src_sec; hal_dma_sec_attr_t channel_dest_sec; } hal_dma_node_config_t;

HAL1

HAL2

                 typedef struct
{
  uint32_t                    NodeType;

  DMA_InitTypeDef             Init;
  DMA_DataHandlingConfTypeDef DataHandlingConfig;
  DMA_TriggerConfTypeDef      TriggerConfig;
  DMA_RepeatBlockConfTypeDef  RepeatBlockConfig;

  uint32_t                    SrcAddress;
  uint32_t                    DstAddress;

  uint32_t                    DataSize;
  uint32_t                    SrcSecure;
  uint32_t                    DestSecure;
} DMA_NodeConfTypeDef;

                 typedef struct
{
  The node type is removed from the node configuration structure and added as parameter in functions: HAL_DMA_FillNodeConfig() and HAL_DMA_FillNodeDirectXfer().

  hal_dma_direct_xfer_config_t         xfer;
  hal_dma_data_handling_config_t       data_handling;
  hal_dma_trigger_config_t             trigger;
  hal_dma_repeat_block_config_t        repeat_block;
  hal_dma_hardware_request_mode_t      hw_request_mode;
  uint32_t                             src_addr;
  uint32_t                             dest_addr;
  hal_dma_port_t                       src_port;
  hal_dma_port_t                       dest_port;
  uint32_t                             src_burst_length_byte;
  uint32_t                             dest_burst_length_byte;
  hal_dma_linkedlist_xfer_event_mode_t xfer_event_mode;

  uint32_t                             size_byte;
  hal_dma_sec_attr_t                   channel_src_sec;
  hal_dma_sec_attr_t                   channel_dest_sec;
} hal_dma_node_config_t;

                

HAL DMA repeat block configuration type definition ¶

HAL1	HAL2
typedef struct { uint32_t RepeatCount; int32_t SrcAddrOffset; int32_t DestAddrOffset; int32_t BlkSrcAddrOffset; int32_t BlkDestAddrOffset; } DMA_RepeatBlockConfTypeDef;	typedef struct { uint32_t block_count; uint32_t burst_src_offset_byte; hal_dma_burst_src_increment_t burst_src_inc; uint32_t burst_dest_offset_byte; hal_dma_burst_dest_increment_t burst_dest_inc; uint32_t block_src_offset_byte; uint32_t block_dest_offset_byte; hal_dma_block_src_increment_t block_src_inc; hal_dma_block_dest_increment_t block_dest_inc; hal_dma_direct_xfer_event_mode_t xfer_event_mode; } hal_dma_repeat_block_config_t;

HAL1

HAL2

                 typedef struct
{
  uint32_t RepeatCount;

  int32_t SrcAddrOffset;

  int32_t DestAddrOffset;

  int32_t BlkSrcAddrOffset;
  int32_t BlkDestAddrOffset;

} DMA_RepeatBlockConfTypeDef;

                 typedef struct
{
  uint32_t                         block_count;

  uint32_t                         burst_src_offset_byte;
  hal_dma_burst_src_increment_t    burst_src_inc;

  uint32_t                         burst_dest_offset_byte;
  hal_dma_burst_dest_increment_t   burst_dest_inc;

  uint32_t                         block_src_offset_byte;
  uint32_t                         block_dest_offset_byte;
  hal_dma_block_src_increment_t    block_src_inc;
  hal_dma_block_dest_increment_t   block_dest_inc;
  hal_dma_direct_xfer_event_mode_t xfer_event_mode;


} hal_dma_repeat_block_config_t;

                

HAL DMA linked-list node type definition ¶

HAL1	HAL2
typedef struct { uint32_t LinkRegisters[8U]; uint32_t NodeInfo; } DMA_NodeTypeDef;	typedef struct { uint32_t regs[LL_DMA_NODE_REGISTER_NUM]; uint32_t info; } hal_dma_node_t;